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1
A memory system design framework : creating smart memori..:
, In:
Proceedings of the 36th annual international symposium on Computer architecture
,
Firoozshahian, Amin
;
Solomatnikov, Alex
;
Shacham, Ofer
... - p. 406-417 , 2009
Link:
https://dl.acm.org/doi/10.1145/1555754.1555805
RT T1 <cTitle>Proceedings of the 36th annual international symposium on Computer architecture</cTitle>: T1 <Title>A memory system design framework : creating smart memories</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1555805&Exemplar=1&LAN=DE A1 Firoozshahian, Amin A1 Solomatnikov, Alex A1 Shacham, Ofer A1 Asgar, Zain A1 Richardson, Stephen A1 Kozyrakis, Christos A1 Horowitz, Mark PB ACM YR 2009 K1 cache coherence K1 memory access protocol K1 memory systems K1 multi-core processors K1 protocol controller K1 reconfigurable architecture K1 stream programming K1 transactional memory K1 Hardware K1 Integrated circuits K1 Semiconductor memory K1 Electronic design automation K1 High-level and register-transfer level synthesis SP 406 OP 417 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1555754.1555805 DO https://dl.acm.org/doi/10.1145/1555754.1555805 SF ELIB - SuUB Bremen
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