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1
Frequency and yield optimization using power gates in power..:
, In:
Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design
,
Kim, Nam Sung
;
Seomun, Jun
;
Sinkar, Abhishek
... - p. 121-126 , 2009
Link:
https://dl.acm.org/doi/10.1145/1594233.1594263
RT T1 <cTitle>Proceedings of the 2009 ACM/IEEE international symposium on Low power electronics and design</cTitle>: T1 <Title>Frequency and yield optimization using power gates in power-constrained designs</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1594263&Exemplar=1&LAN=DE A1 Kim, Nam Sung A1 Seomun, Jun A1 Sinkar, Abhishek A1 Lee, Jungseob A1 Han, Tae Hee A1 Choi, Ken A1 Shin, Youngsoo PB ACM YR 2009 K1 frequency K1 optimization K1 power gate K1 yield K1 Hardware K1 Emerging technologies K1 Very large scale integration design SP 121 OP 126 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1594233.1594263 DO https://dl.acm.org/doi/10.1145/1594233.1594263 SF ELIB - SuUB Bremen
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