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1 Ergebnisse
1
No cache-coherence : a single-cycle ring interconnection..:
, In:
Proceedings of the 46th Annual Design Automation Conference
,
Chou, Shu-Hsuan
;
Chen, Chien-Chih
;
Wen, Chi-Neng
... - p. 587-592 , 2009
Link:
https://dl.acm.org/doi/10.1145/1629911.1630062
RT T1 <cTitle>Proceedings of the 46th Annual Design Automation Conference</cTitle>: T1 <Title>No cache-coherence : a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1630062&Exemplar=1&LAN=DE A1 Chou, Shu-Hsuan A1 Chen, Chien-Chih A1 Wen, Chi-Neng A1 Chan, Yi-Chao A1 Chen, Tien-Fu A1 Wang, Chao-Ching A1 Wang, Jinn-Shyan PB ACM YR 2009 K1 NOC K1 SOC K1 arbitration K1 level-1 non-uniform cache architecture K1 memory structure K1 multi-core K1 ring interconnection K1 single-cycle transactions K1 Hardware K1 Communication hardware, interfaces and storage K1 Buses and high-speed links K1 Computer systems organization K1 Architectures K1 Parallel architectures K1 Multiple instruction, multiple data SP 587 OP 592 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1629911.1630062 DO https://dl.acm.org/doi/10.1145/1629911.1630062 SF ELIB - SuUB Bremen
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