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A gate-level pipelined 2.97GHz self synchronous FPGA in 65n..:

, In: Proceedings of the 16th Asia and South Pacific Design Automation Conference,
Devlin, Benjamin ; Ikeda, Makoto ; Asada, Kunihiro - p. 75-76 , 2011
Link: https://dl.acm.org/doi/10.5555/1950815.1950829