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1
An instruction-scheduling-aware data partitioning technique..:
, In:
Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
,
Jang, Choonki
;
Kim, Jungwon
;
Lee, Jaejin
... - p. 151-160 , 2011
Link:
https://dl.acm.org/doi/10.1145/1967677.1967699
RT T1 <cTitle>Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems</cTitle>: T1 <Title>An instruction-scheduling-aware data partitioning technique for coarse-grained reconfigurable architectures</Title> UL https://suche.suub.uni-bremen.de/peid=acm-1967699&Exemplar=1&LAN=DE A1 Jang, Choonki A1 Kim, Jungwon A1 Lee, Jaejin A1 Kim, Hee-Seok A1 Yoo, Dong-Hoon A1 Kim, Sukjin A1 Kim, Hong-Seok A1 Ryu, Soojung PB ACM YR 2011 K1 coarse grained reconfigurable arrays K1 compilers K1 data partitioning K1 instruction scheduling K1 vliw K1 Software and its engineering K1 Software notations and tools K1 Compilers K1 Source code generation SP 151 OP 160 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/1967677.1967699 DO https://dl.acm.org/doi/10.1145/1967677.1967699 SF ELIB - SuUB Bremen
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