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A new low power and area efficient semi-digital PLL archite..:

, In: Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI,
Dietl, Markus ; Sareen, Puneet - p. 363-366 , 2011
Link: https://dl.acm.org/doi/10.1145/1973009.1973083