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1 Ergebnisse
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Analysis of STT-RAM cell design with multiple MTJs per acce..:
, In:
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
,
Park, Henry
;
Dorrance, Richard
;
Amin, Amr
... - p. 53-58 , 2011
Link:
https://dl.acm.org/doi/10.1109/NANOARCH.2011.5941483
RT T1
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
: T1
Analysis of STT-RAM cell design with multiple MTJs per access
UL https://suche.suub.uni-bremen.de/peid=acm-2052103&Exemplar=1&LAN=DE A1 Park, Henry A1 Dorrance, Richard A1 Amin, Amr A1 Ren, Fengbo A1 Markovic, Dejan A1 Ken Yang, C. K. PB IEEE Computer Society YR 2011 K1 Hardware K1 Integrated circuits K1 Semiconductor memory K1 Static memory K1 Applied computing K1 Physical sciences and engineering K1 Electronics SP 53 OP 58 LK http://dx.doi.org/https://dl.acm.org/doi/10.1109/NANOARCH.2011.5941483 DO https://dl.acm.org/doi/10.1109/NANOARCH.2011.5941483 SF ELIB - SuUB Bremen
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