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1
Efficient in-system RTL verification and debugging using FP..:
, In:
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
,
Saha, Proshanta
;
Haymes, Chuck
;
Bellofatto, Ralph
... - p. 269 ff. , 2012
Link:
https://dl.acm.org/doi/10.1145/2145694.2145753
RT T1
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
: T1
Efficient in-system RTL verification and debugging using FPGAs (abstract only)
UL https://suche.suub.uni-bremen.de/peid=acm-2145753&Exemplar=1&LAN=DE A1 Saha, Proshanta A1 Haymes, Chuck A1 Bellofatto, Ralph A1 Brezzo, Bernard A1 Kapur, Mohit A1 Asaad, Sameh PB ACM YR 2012 K1 fpga debugging K1 fpga-based acceleration K1 processor simulation K1 Hardware K1 Integrated circuits K1 Logic circuits K1 Computer systems organization K1 Architectures K1 Parallel architectures SP 269 ff. LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2145694.2145753 DO https://dl.acm.org/doi/10.1145/2145694.2145753 SF ELIB - SuUB Bremen
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