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1 Ergebnisse
1
Statistical Timing and Power Optimization of Architecture a..:
Cheng, Lerong
;
Xu, Wenyao
;
Gong, Fang
...
ACM Transactions on Reconfigurable Technology and Systems (TRETS). 5 (2012) 2 - p. 1-19 , 2012
Link:
https://dl.acm.org/doi/10.1145/2209285.2209288
RT Journal T1
Statistical Timing and Power Optimization of Architecture and Device for FPGAs
UL https://suche.suub.uni-bremen.de/peid=acm-2209288&Exemplar=1&LAN=DE A1 Cheng, Lerong A1 Xu, Wenyao A1 Gong, Fang A1 Lin, Yan A1 Wong, Ho-Yan A1 He, Lei PB ACM YR 2012 SN 1936-7406 SN 1936-7414 K1 FPGA architecture K1 Timing K1 leakage K1 yield estimation K1 Hardware K1 Electronic design automation K1 Physical design (EDA) JF ACM Transactions on Reconfigurable Technology and Systems (TRETS) VO 5 IS 2 SP 1 OP 19 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2209285.2209288 DO https://dl.acm.org/doi/10.1145/2209285.2209288 SF ELIB - SuUB Bremen
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