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1 Ergebnisse
1
Hierarchical strategy of model partitioning for VLSI-design..:
, In:
Proceedings of the tenth workshop on Parallel and distributed simulation
,
Hering, K.
;
Haupt, R.
;
Villmann, Th.
- p. 106-113 , 1996
Link:
https://dl.acm.org/doi/10.1145/238788.238825
RT T1
Proceedings of the tenth workshop on Parallel and distributed simulation
: T1
Hierarchical strategy of model partitioning for VLSI-design using an improved mixture of experts approach
UL https://suche.suub.uni-bremen.de/peid=acm-238825&Exemplar=1&LAN=DE A1 Hering, K. A1 Haupt, R. A1 Villmann, Th. PB IEEE Computer Society YR 1996 K1 Genetic Algorithms K1 Logic Simulation K1 Partitioning K1 VLSI-Design K1 Hardware K1 Emerging technologies K1 Very large scale integration design SP 106 OP 113 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/238788.238825 DO https://dl.acm.org/doi/10.1145/238788.238825 SF ELIB - SuUB Bremen
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