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1 Ergebnisse
1
A Fully Pipelined FPGA Architecture of a Factored Restricte..:
Kim, Lok-Won
;
Asaad, Sameh
;
Linsker, Ralph
ACM Transactions on Reconfigurable Technology and Systems (TRETS). 7 (2014) 1 - p. 1-23 , 2014
Link:
https://dl.acm.org/doi/10.1145/2539125
RT Journal T1
A Fully Pipelined FPGA Architecture of a Factored Restricted Boltzmann Machine Artificial Neural Network
UL https://suche.suub.uni-bremen.de/peid=acm-2539125&Exemplar=1&LAN=DE A1 Kim, Lok-Won A1 Asaad, Sameh A1 Linsker, Ralph PB ACM YR 2014 SN 1936-7406 SN 1936-7414 K1 FPGA based system design K1 Restricted Boltzmann Machine K1 hardware acceleration of Neural Network K1 pipelined and parallel hardware architecture K1 Hardware K1 Electronic design automation K1 High-level and register-transfer level synthesis JF ACM Transactions on Reconfigurable Technology and Systems (TRETS) VO 7 IS 1 SP 1 OP 23 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2539125 DO https://dl.acm.org/doi/10.1145/2539125 SF ELIB - SuUB Bremen
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