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1 Ergebnisse
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Extended Instruction Exploration for Multiple-Issue Archite..:
Wu, I-Wei
;
Shann, Jean Jyh-Jiun
;
Hsu, Wei-Chung
.
ACM Transactions on Embedded Computing Systems (TECS). 13 (2014) 4 - p. 1-28 , 2014
Link:
https://dl.acm.org/doi/10.1145/2560039
RT Journal T1
Extended Instruction Exploration for Multiple-Issue Architectures
UL https://suche.suub.uni-bremen.de/peid=acm-2560039&Exemplar=1&LAN=DE A1 Wu, I-Wei A1 Shann, Jean Jyh-Jiun A1 Hsu, Wei-Chung A1 Chung, Chung-Ping PB ACM YR 2014 SN 1539-9087 SN 1558-3465 K1 Extended instruction (EI) K1 application-specific instruction-set processor (ASIP) K1 customizable processor K1 instruction set extension (ISE) K1 multiple-issue architecture K1 Computer systems organization K1 Architectures K1 Serial architectures K1 Complex instruction set computing K1 Parallel architectures K1 Very long instruction word K1 Reduced instruction set computing JF ACM Transactions on Embedded Computing Systems (TECS) VO 13 IS 4 SP 1 OP 28 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2560039 DO https://dl.acm.org/doi/10.1145/2560039 SF ELIB - SuUB Bremen
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