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1 Ergebnisse
1
Improving processor hardware compiled cycle accurate simula..:
, In:
Proceedings of the 7th International ICST Conference on Simulation Tools and Techniques
,
Adrien, Bullich
;
Mikaël, Briday
;
Jean-Luc, Béchennec
. - p. 186-194 , 2014
Link:
https://dl.acm.org/doi/10.4108/icst.simutools.2014.254..
RT T1 <cTitle>Proceedings of the 7th International ICST Conference on Simulation Tools and Techniques</cTitle>: T1 <Title>Improving processor hardware compiled cycle accurate simulation using program abstraction</Title> UL https://suche.suub.uni-bremen.de/peid=acm-2643126&Exemplar=1&LAN=DE A1 Adrien, Bullich A1 Mikaël, Briday A1 Jean-Luc, Béchennec A1 Yvon, Trinquet PB ICST (Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering) YR 2014 K1 compiled simulation K1 cycle accurate simulation K1 processor hardware simulation K1 real-time systems K1 Hardware K1 Hardware test K1 Robustness K1 Computing methodologies K1 Modeling and simulation K1 Simulation support systems K1 Hardware validation SP 186 OP 194 LK http://dx.doi.org/https://dl.acm.org/doi/10.4108/icst.simutools.2014.254792 DO https://dl.acm.org/doi/10.4108/icst.simutools.2014.254792 SF ELIB - SuUB Bremen
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