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1 Ergebnisse
1
A 40 nm 0.32 V 3.5 MHz 11T single-ended bit-interleaving su..:
, In:
Proceedings of the 2013 International Symposium on Low Power Electronics and Design
,
Chiu, Yi-Wei
;
Hu, Yu-Hao
;
Tu, Ming-Hsien
... - p. 51-56 , 2013
Link:
https://dl.acm.org/doi/10.5555/2648668.2648683
RT T1
Proceedings of the 2013 International Symposium on Low Power Electronics and Design
: T1
A 40 nm 0.32 V 3.5 MHz 11T single-ended bit-interleaving subthreshold SRAM with data-aware write-assist
UL https://suche.suub.uni-bremen.de/peid=acm-2648683&Exemplar=1&LAN=DE A1 Chiu, Yi-Wei A1 Hu, Yu-Hao A1 Tu, Ming-Hsien A1 Zhao, Jun-Kai A1 Jou, Shyh-Jye A1 Chuang, Ching-Te PB IEEE Press YR 2013 K1 Applied computing K1 Physical sciences and engineering K1 Electronics K1 Hardware K1 Integrated circuits K1 Semiconductor memory K1 Static memory K1 Hardware validation SP 51 OP 56 LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/2648668.2648683 DO https://dl.acm.org/doi/10.5555/2648668.2648683 SF ELIB - SuUB Bremen
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