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1 Ergebnisse
1
Exploring synergistic DVFS control of cores and DRAMs for t..:
, In:
Proceedings of the 2013 International Symposium on Low Power Electronics and Design
,
Lin, Ping-Sheng
;
Chen, Yi-Jung
;
Yang, Chia-Lin
. - p. 304 ff. , 2013
Link:
https://dl.acm.org/doi/10.5555/2648668.2648743
RT T1 <cTitle>Proceedings of the 2013 International Symposium on Low Power Electronics and Design</cTitle>: T1 <Title>Exploring synergistic DVFS control of cores and DRAMs for thermal efficiency in CMPs with 3D-stacked DRAMs</Title> UL https://suche.suub.uni-bremen.de/peid=acm-2648743&Exemplar=1&LAN=DE A1 Lin, Ping-Sheng A1 Chen, Yi-Jung A1 Yang, Chia-Lin A1 Lu, Yi-Chang PB IEEE Press YR 2013 K1 Hardware K1 Integrated circuits K1 Semiconductor memory K1 Dynamic memory K1 Hardware validation K1 Applied computing K1 Physical sciences and engineering K1 Electronics SP 304 ff. LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/2648668.2648743 DO https://dl.acm.org/doi/10.5555/2648668.2648743 SF ELIB - SuUB Bremen
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