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1 Ergebnisse
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An Efficient Parallel Yet Pipelined Reconfigurable Architec..:
, In:
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design
,
da Silva, Felipe P.
;
de Sá, Alan Oliveria
;
Nedjah, Nadia
. - p. 1-7 , 2014
Link:
https://dl.acm.org/doi/10.1145/2660540.2660998
RT T1
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design
: T1
An Efficient Parallel Yet Pipelined Reconfigurable Architecture for M-PLN Weightless Neural Networks
UL https://suche.suub.uni-bremen.de/peid=acm-2660998&Exemplar=1&LAN=DE A1 da Silva, Felipe P. A1 de Sá, Alan Oliveria A1 Nedjah, Nadia A1 de Macedo Mourelle, Luiza PB ACM YR 2014 K1 FPGA K1 Hardware K1 Neural Networks K1 Hardware K1 Electronic design automation K1 High-level and register-transfer level synthesis K1 Computer systems organization K1 Architectures K1 Other architectures K1 Parallel architectures SP 1 OP 7 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2660540.2660998 DO https://dl.acm.org/doi/10.1145/2660540.2660998 SF ELIB - SuUB Bremen
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