I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
Improving DRAM latency with dynamic asymmetric subarray:
, In:
Proceedings of the 48th International Symposium on Microarchitecture
,
Lu, Shih-Lien
;
Lin, Ying-Chen
;
Yang, Chia-Lin
- p. 255-266 , 2015
Link:
https://dl.acm.org/doi/10.1145/2830772.2830827
RT T1 <cTitle>Proceedings of the 48th International Symposium on Microarchitecture</cTitle>: T1 <Title>Improving DRAM latency with dynamic asymmetric subarray</Title> UL https://suche.suub.uni-bremen.de/peid=acm-2830827&Exemplar=1&LAN=DE A1 Lu, Shih-Lien A1 Lin, Ying-Chen A1 Yang, Chia-Lin PB ACM YR 2015 K1 Hardware K1 Integrated circuits K1 Semiconductor memory K1 Dynamic memory SP 255 OP 266 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2830772.2830827 DO https://dl.acm.org/doi/10.1145/2830772.2830827 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)
