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1 Ergebnisse
1
Throughput-Optimized OpenCL-based FPGA Accelerator for Larg..:
, In:
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
,
Suda, Naveen
;
Chandra, Vikas
;
Dasika, Ganesh
... - p. 16-25 , 2016
Link:
https://dl.acm.org/doi/10.1145/2847263.2847276
RT T1 <cTitle>Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays</cTitle>: T1 <Title>Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks</Title> UL https://suche.suub.uni-bremen.de/peid=acm-2847276&Exemplar=1&LAN=DE A1 Suda, Naveen A1 Chandra, Vikas A1 Dasika, Ganesh A1 Mohanty, Abinash A1 Ma, Yufei A1 Vrudhula, Sarma A1 Seo, Jae-sun A1 Cao, Yu PB ACM YR 2016 K1 convolutional neural networks K1 fpga K1 opencl K1 optimization K1 Hardware K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Hardware accelerators SP 16 OP 25 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2847263.2847276 DO https://dl.acm.org/doi/10.1145/2847263.2847276 SF ELIB - SuUB Bremen
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