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Logic simulation system using simulation processor (SP):

, In: Proceedings of the 25th ACM/IEEE Design Automation Conference,

Saitoh, Minoru ; Iwata, Kenji ; Nokamura, Akiko... - p. 225-230 , 1988

Link: https://dl.acm.org/doi/10.5555/285730.285767

RT 
T1 <cTitle>Proceedings of the 25th ACM/IEEE Design Automation Conference</cTitle>: T1 <Title>Logic simulation system using simulation processor (SP)</Title>

UL https://suche.suub.uni-bremen.de/peid=acm-285767&Exemplar=1&LAN=DE
				
A1 Saitoh, Minoru
A1 Iwata, Kenji
A1 Nokamura, Akiko
A1 Kakegawa, Makoto
A1 Masuda, Junichi
A1 Hamamura, Hirofumi
A1 Hirose, Fumiyasu
A1 Kawato, Nobuaki
PB IEEE Computer Society Press
YR 1988
K1 Networks
K1 Network performance evaluation
K1 Computer systems organization
K1 Dependable and fault-tolerant systems and networks
K1 General and reference
K1 Cross-computing tools and techniques
K1 Performance
K1 Hardware
K1 Very large scale integration design
K1 Hardware validation
K1 Functional verification
K1 Simulation and emulation
K1 Robustness
K1 Applied computing
K1 Physical sciences and engineering
K1 Engineering
SP 225
OP 230
LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/285730.285767
DO https://dl.acm.org/doi/10.5555/285730.285767
SF ELIB - SuUB Bremen

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