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1 Ergebnisse
1
A bandwidth-efficient architecture for media processing:
, In:
Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
,
Rixner, Scott
;
Dally, William J.
;
Kapasi, Ujval J.
... - p. 3-13 , 1998
Link:
https://dl.acm.org/doi/10.5555/290940.290946
RT T1
Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture
: T1
A bandwidth-efficient architecture for media processing
UL https://suche.suub.uni-bremen.de/peid=acm-290946&Exemplar=1&LAN=DE A1 Rixner, Scott A1 Dally, William J. A1 Kapasi, Ujval J. A1 Khailany, Brucek A1 López-Lagunas, Abelardo A1 Mattson, Peter R. A1 Owens, John D. PB IEEE Computer Society Press YR 1998 K1 Hardware K1 Hardware validation K1 Electronic design automation K1 High-level and register-transfer level synthesis SP 3 OP 13 LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/290940.290946 DO https://dl.acm.org/doi/10.5555/290940.290946 SF ELIB - SuUB Bremen
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