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Architectural performance analysis of FPGA synthesized LEON..:

, In: Proceedings of the 27th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype,

Damman, Corentin ; Edison, Gregory ; Guet, Fabrice... - p. 33-40 , 2016

Link: https://dl.acm.org/doi/10.1145/2990299.2990306

RT 
T1 <cTitle>Proceedings of the 27th International Symposium on Rapid System Prototyping: Shortening the Path from Specification to Prototype</cTitle>: T1 <Title>Architectural performance analysis of FPGA synthesized LEON processors</Title>

UL https://suche.suub.uni-bremen.de/peid=acm-2990306&Exemplar=1&LAN=DE
				
A1 Damman, Corentin
A1 Edison, Gregory
A1 Guet, Fabrice
A1 Noulard, Eric
A1 Santinelli, Luca
A1 Hugues, Jerome
PB ACM
YR 2016
K1 FPGA
K1 LEON
K1 benchmarking
K1 embedded systems
K1 performance analysis
K1 probabilistic worst-case execution time
K1 processor synthesis
K1 Hardware
K1 Electronic design automation
K1 Timing analysis
K1 Statistical timing analysis
K1 Computer systems organization
K1 Architectures
K1 Other architectures
K1 Reconfigurable computing
K1 Real-time systems
K1 Real-time system architecture
K1 Embedded and cyber-physical systems
K1 Embedded systems
K1 Embedded hardware
SP 33
OP 40
LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/2990299.2990306
DO https://dl.acm.org/doi/10.1145/2990299.2990306
SF ELIB - SuUB Bremen

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