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120-core microAptiv MIPS Overlay for the Terasic DE5-NET FP..:
, In:
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
,
Kumar H B, Chethan
;
Ravi, Prashant
;
Modi, Gourav
. - p. 141-146 , 2017
Link:
https://dl.acm.org/doi/10.1145/3020078.3021751
RT T1 <cTitle>Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays</cTitle>: T1 <Title>120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3021751&Exemplar=1&LAN=DE A1 Kumar H B, Chethan A1 Ravi, Prashant A1 Modi, Gourav A1 Kapre, Nachiket PB ACM YR 2017 K1 miscellaneous K1 Computer systems organization K1 Architectures K1 Parallel architectures K1 Multicore architectures K1 Hardware K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Hardware accelerators K1 Networks K1 Network types K1 Network on chip SP 141 OP 146 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3020078.3021751 DO https://dl.acm.org/doi/10.1145/3020078.3021751 SF ELIB - SuUB Bremen
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