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Teaching computer architecture with a new superscalar proce..:
, In:
Proceedings of the 4th annual SIGCSE/SIGCUE ITiCSE conference on Innovation and technology in computer science education
,
de la Fuente, Santiago Rodríguez
;
Clemente, M. Isabel García
;
Cavanillas, Rafael Méndez
- p. 99-102 , 1999
Link:
https://dl.acm.org/doi/10.1145/305786.305881
RT T1
Proceedings of the 4th annual SIGCSE/SIGCUE ITiCSE conference on Innovation and technology in computer science education
: T1
Teaching computer architecture with a new superscalar processor emulator
UL https://suche.suub.uni-bremen.de/peid=acm-305881&Exemplar=1&LAN=DE A1 de la Fuente, Santiago Rodríguez A1 Clemente, M. Isabel García A1 Cavanillas, Rafael Méndez PB ACM YR 1999 K1 cache memory K1 education K1 emulation K1 pipeline K1 superscalar K1 Applied computing K1 Education SP 99 OP 102 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/305786.305881 DO https://dl.acm.org/doi/10.1145/305786.305881 SF ELIB - SuUB Bremen
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