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1
Pipelining a triggered processing element:
, In:
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture
,
Repetti, Thomas J.
;
Cerqueira, João P.
;
Kim, Martha A.
. - p. 96-108 , 2017
Link:
https://dl.acm.org/doi/10.1145/3123939.3124551
RT T1
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture
: T1
Pipelining a triggered processing element
UL https://suche.suub.uni-bremen.de/peid=acm-3124551&Exemplar=1&LAN=DE A1 Repetti, Thomas J. A1 Cerqueira, João P. A1 Kim, Martha A. A1 Seok, Mingoo PB ACM YR 2017 K1 design-space exploration K1 low-power design K1 microarchitecture K1 pipeline hazards K1 spatial architectures K1 Computer systems organization K1 Architectures K1 Serial architectures K1 Pipeline computing K1 Reduced instruction set computing K1 Hardware K1 Power and energy K1 Parallel architectures K1 Multicore architectures K1 Interconnection architectures K1 Multiple instruction, multiple data SP 96 OP 108 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3123939.3124551 DO https://dl.acm.org/doi/10.1145/3123939.3124551 SF ELIB - SuUB Bremen
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