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Timestamp Temporal Logic (TTL) for Testing the Timing of Cy..:
Mehrabian, Mohammadreza
;
Khayatian, Mohammad
;
Shrivastava, Aviral
...
ACM Transactions on Embedded Computing Systems (TECS). 16 (2017) 5s - p. 1-20 , 2017
Link:
https://dl.acm.org/doi/10.1145/3126510
RT Journal T1 <Title>Timestamp Temporal Logic (TTL) for Testing the Timing of Cyber-Physical Systems</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3126510&Exemplar=1&LAN=DE A1 Mehrabian, Mohammadreza A1 Khayatian, Mohammad A1 Shrivastava, Aviral A1 Eidson, John C. A1 Derler, Patricia A1 Andrade, Hugo A. A1 Li-Baboud, Ya-Shian A1 Griffor, Edward A1 Weiss, Marc A1 Stanton, Kevin PB ACM YR 2017 SN 1539-9087 SN 1558-3465 K1 CPS K1 Cyber-Physical Systems K1 Real-Time Systems K1 Safety Critical Systems K1 Time Testing K1 Timing Constraints K1 Verification K1 Computer systems organization K1 Embedded and cyber-physical systems K1 Embedded systems K1 Embedded software JF ACM Transactions on Embedded Computing Systems (TECS) VO 16 IS 5s SP 1 OP 20 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3126510 DO https://dl.acm.org/doi/10.1145/3126510 SF ELIB - SuUB Bremen
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