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1 Ergebnisse
1
Rosetta : A Realistic High-Level Synthesis Benchmark Sui..:
, In:
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
,
Zhou, Yuan
;
Gupta, Udit
;
Dai, Steve
... - p. 269-278 , 2018
Link:
https://dl.acm.org/doi/10.1145/3174243.3174255
RT T1
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
: T1
Rosetta : A Realistic High-Level Synthesis Benchmark Suite for Software Programmable FPGAs
UL https://suche.suub.uni-bremen.de/peid=acm-3174255&Exemplar=1&LAN=DE A1 Zhou, Yuan A1 Gupta, Udit A1 Dai, Steve A1 Zhao, Ritchie A1 Srivastava, Nitish A1 Jin, Hanchen A1 Featherston, Joseph A1 Lai, Yi-Hsiang A1 Liu, Gai A1 Velasquez, Gustavo Angarita A1 Wang, Wenping A1 Zhang, Zhiru PB ACM YR 2018 K1 benchmarking K1 fpga K1 heterogeneous computing K1 high-level synthesis K1 reconfigurable computing K1 Computer systems organization K1 Architectures K1 Other architectures K1 Reconfigurable computing K1 Heterogeneous (hybrid) systems K1 Hardware K1 Electronic design automation K1 High-level and register-transfer level synthesis K1 Hardware-software codesign K1 Methodologies for EDA K1 Design databases for EDA K1 Modeling and parameter extraction K1 Best practices for EDA SP 269 OP 278 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3174243.3174255 DO https://dl.acm.org/doi/10.1145/3174243.3174255 SF ELIB - SuUB Bremen
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