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1 Ergebnisse
1
Basejump STL: systemverilog needs a standard template libra..:
, In:
Proceedings of the 55th Annual Design Automation Conference
,
Taylor, Michael Bedford
- p. 1-6 , 2018
Link:
https://dl.acm.org/doi/10.1145/3195970.3199848
RT T1 <cTitle>Proceedings of the 55th Annual Design Automation Conference</cTitle>: T1 <Title>Basejump STL: systemverilog needs a standard template library for hardware design</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3199848&Exemplar=1&LAN=DE A1 Taylor, Michael Bedford PB ACM YR 2018 K1 hardware design K1 Hardware K1 Very large scale integration design K1 VLSI system specification and constraints SP 1 OP 6 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3195970.3199848 DO https://dl.acm.org/doi/10.1145/3195970.3199848 SF ELIB - SuUB Bremen
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