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1 Ergebnisse
1
HeteroCL : A Multi-Paradigm Programming Infrastructure f..:
, In:
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
,
Lai, Yi-Hsiang
;
Chi, Yuze
;
Hu, Yuwei
... - p. 242-251 , 2019
Link:
https://dl.acm.org/doi/10.1145/3289602.3293910
RT T1
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
: T1
HeteroCL : A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing
UL https://suche.suub.uni-bremen.de/peid=acm-3293910&Exemplar=1&LAN=DE A1 Lai, Yi-Hsiang A1 Chi, Yuze A1 Hu, Yuwei A1 Wang, Jie A1 Yu, Cody Hao A1 Zhou, Yuan A1 Cong, Jason A1 Zhang, Zhiru PB ACM YR 2019 K1 compiler K1 domain-specific language K1 fpga K1 hardware accelerator K1 high-level synthesis K1 multi-paradigm programming K1 python K1 reconfigurable computing K1 spatial architecture K1 stencil K1 systolic array K1 Hardware K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Hardware accelerators K1 Software and its engineering K1 Software notations and tools K1 Context specific languages K1 Domain specific languages K1 Electronic design automation K1 High-level and register-transfer level synthesis K1 Hardware-software codesign K1 Reconfigurable logic applications SP 242 OP 251 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3289602.3293910 DO https://dl.acm.org/doi/10.1145/3289602.3293910 SF ELIB - SuUB Bremen
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