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1 Ergebnisse
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Reduction from branching-time property verification of high..:
, In:
Proceedings of the 2019 ACM SIGPLAN Workshop on Partial Evaluation and Program Manipulation
,
Watanabe, Keiichi
;
Tsukada, Takeshi
;
Oshikawa, Hiroki
. - p. 22-34 , 2019
Link:
https://dl.acm.org/doi/10.1145/3294032.3294077
RT T1
Proceedings of the 2019 ACM SIGPLAN Workshop on Partial Evaluation and Program Manipulation
: T1
Reduction from branching-time property verification of higher-order programs to HFL validity checking
UL https://suche.suub.uni-bremen.de/peid=acm-3294077&Exemplar=1&LAN=DE A1 Watanabe, Keiichi A1 Tsukada, Takeshi A1 Oshikawa, Hiroki A1 Kobayashi, Naoki PB ACM YR 2019 K1 higher-order fixpoint logic K1 higher-order program verification K1 Theory of computation K1 Logic K1 Logic and verification SP 22 OP 34 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3294032.3294077 DO https://dl.acm.org/doi/10.1145/3294032.3294077 SF ELIB - SuUB Bremen
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