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1 Ergebnisse
1
CASCADE : Connecting RRAMs to Extend Analog Dataflow In ..:
, In:
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture
,
Chou, Teyuh
;
Tang, Wei
;
Botimer, Jacob
. - p. 114-125 , 2019
Link:
https://dl.acm.org/doi/10.1145/3352460.3358328
RT T1 <cTitle>Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture</cTitle>: T1 <Title>CASCADE : Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3358328&Exemplar=1&LAN=DE A1 Chou, Teyuh A1 Tang, Wei A1 Botimer, Jacob A1 Zhang, Zhengya PB ACM YR 2019 K1 Neural network accelerator K1 Process in memory K1 Resistive RAM K1 Computer systems organization K1 Architectures K1 Parallel architectures K1 Single instruction, multiple data K1 Other architectures K1 Neural networks SP 114 OP 125 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3352460.3358328 DO https://dl.acm.org/doi/10.1145/3352460.3358328 SF ELIB - SuUB Bremen
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