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LUXOR : An FPGA Logic Cell Architecture for Efficient Co..:
, In:
Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
,
Rasoulinezhad, Seyedramin
;
Siddhartha
;
Zhou, Hao
... - p. 161-171 , 2020
Link:
https://dl.acm.org/doi/10.1145/3373087.3375303
RT T1 <cTitle>Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays</cTitle>: T1 <Title>LUXOR : An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3375303&Exemplar=1&LAN=DE A1 Rasoulinezhad, Seyedramin A1 Siddhartha A1 Zhou, Hao A1 Wang, Lingli A1 Boland, David A1 Leong, Philip H. W. PB ACM YR 2020 K1 compressor trees K1 fpga architectures K1 logic elements K1 Hardware K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Programmable logic elements K1 Mathematics of computing K1 Mathematical analysis K1 Numerical analysis K1 Arbitrary-precision arithmetic SP 161 OP 171 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3373087.3375303 DO https://dl.acm.org/doi/10.1145/3373087.3375303 SF ELIB - SuUB Bremen
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