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Studying the Potential of Automatic Optimizations in the In..:
, In:
Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
,
Ejjeh, Adel
;
Adve, Vikram
;
Rutenbar, Rob A.
- p. 318 ff. , 2020
Link:
https://dl.acm.org/doi/10.1145/3373087.3375355
RT T1 <cTitle>Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays</cTitle>: T1 <Title>Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3375355&Exemplar=1&LAN=DE A1 Ejjeh, Adel A1 Adve, Vikram A1 Rutenbar, Rob A. PB ACM YR 2020 K1 fpga K1 hls K1 intel fpga sdk for opencl K1 Hardware K1 Electronic design automation K1 High-level and register-transfer level synthesis K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Hardware description languages and compilation K1 Methodologies for EDA K1 Software tools for EDA K1 Datapath optimization SP 318 ff. LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3373087.3375355 DO https://dl.acm.org/doi/10.1145/3373087.3375355 SF ELIB - SuUB Bremen
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