I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
Scalable FPGA Median Filtering using Multiple Efficient Pas..:
, In:
Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
,
Rahnama, Oscar
;
Cavallari, Tommaso
;
Torr, Philip H. S.
. - p. 313 ff. , 2020
Link:
https://dl.acm.org/doi/10.1145/3373087.3375388
RT T1 <cTitle>Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays</cTitle>: T1 <Title>Scalable FPGA Median Filtering using Multiple Efficient Passes</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3375388&Exemplar=1&LAN=DE A1 Rahnama, Oscar A1 Cavallari, Tommaso A1 Torr, Philip H. S. A1 Golodetz, Stuart PB ACM YR 2020 K1 benchmarking K1 fpga K1 hardware resource efficiency K1 median filtering K1 scalable hardware accelerators K1 Hardware K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Hardware accelerators K1 Reconfigurable logic applications K1 Very large scale integration design K1 On-chip resource management K1 High-speed input / output SP 313 ff. LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3373087.3375388 DO https://dl.acm.org/doi/10.1145/3373087.3375388 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)
