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1 Ergebnisse
1
Architecture-Accuracy Co-optimization of ReRAM-based Low-co..:
, In:
Proceedings of the 2020 on Great Lakes Symposium on VLSI
,
Lee, Segi
;
Lee, Sugil
;
Lee, Jongeun
... - p. 427-432 , 2020
Link:
https://dl.acm.org/doi/10.1145/3386263.3406954
RT T1 <cTitle>Proceedings of the 2020 on Great Lakes Symposium on VLSI</cTitle>: T1 <Title>Architecture-Accuracy Co-optimization of ReRAM-based Low-cost Neural Network Processor</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3406954&Exemplar=1&LAN=DE A1 Lee, Segi A1 Lee, Sugil A1 Lee, Jongeun A1 Choi, Jong-Moon A1 Kwon, Do-Wan A1 Hong, Seung-Kwang A1 Kwon, Kee-Won PB ACM YR 2020 K1 binarized neural network K1 cost efficient K1 deep neural network K1 resistive RAM crossbar array K1 Hardware K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Hardware accelerators K1 Semiconductor memory K1 Non-volatile memory SP 427 OP 432 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3386263.3406954 DO https://dl.acm.org/doi/10.1145/3386263.3406954 SF ELIB - SuUB Bremen
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