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1 Ergebnisse
1
Dual-output LUT merging during FPGA technology mapping:
, In:
Proceedings of the 39th International Conference on Computer-Aided Design
,
Wang, Feng
;
Zhu, Liren
;
Zhang, Jiaxi
... - p. 1-9 , 2020
Link:
https://dl.acm.org/doi/10.1145/3400302.3415617
RT T1
Proceedings of the 39th International Conference on Computer-Aided Design
: T1
Dual-output LUT merging during FPGA technology mapping
UL https://suche.suub.uni-bremen.de/peid=acm-3415617&Exemplar=1&LAN=DE A1 Wang, Feng A1 Zhu, Liren A1 Zhang, Jiaxi A1 Li, Lei A1 Zhang, Yang A1 Luo, Guojie PB ACM YR 2020 K1 FPGA K1 cut K1 dual-output LUT K1 technology mapping K1 Hardware K1 Electronic design automation K1 Logic synthesis K1 Circuit optimization K1 Technology-mapping SP 1 OP 9 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3400302.3415617 DO https://dl.acm.org/doi/10.1145/3400302.3415617 SF ELIB - SuUB Bremen
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