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1 Ergebnisse
1
VLSI layout and packaging of butterfly networks:
, In:
Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures
,
Yeh, Chi-Hsiang
;
Parhami, Behrooz
;
Varvarigos, E. A.
. - p. 196-205 , 2000
Link:
https://dl.acm.org/doi/10.1145/341800.341823
RT T1
Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures
: T1
VLSI layout and packaging of butterfly networks
UL https://suche.suub.uni-bremen.de/peid=acm-341823&Exemplar=1&LAN=DE A1 Yeh, Chi-Hsiang A1 Parhami, Behrooz A1 Varvarigos, E. A. A1 Lee, H. PB ACM YR 2000 K1 Hardware K1 Very large scale integration design K1 Theory of computation K1 Models of computation K1 Concurrency K1 Electronic design automation K1 Physical design (EDA) K1 Partitioning and floorplanning K1 Networks K1 Network properties K1 Network structure K1 Robustness K1 Mathematics of computing K1 Discrete mathematics K1 Parallel computing models SP 196 OP 205 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/341800.341823 DO https://dl.acm.org/doi/10.1145/341800.341823 SF ELIB - SuUB Bremen
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