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1 Ergebnisse
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A RISC-V in-network accelerator for flexible high-performan..:
, In:
Proceedings of the 48th Annual International Symposium on Computer Architecture
,
Di Girolamo, Salvatore
;
Kurth, Andreas
;
Calotoiu, Alexandru
... - p. 958-971 , 2021
Link:
https://dl.acm.org/doi/10.1109/ISCA52012.2021.00079
RT T1 <cTitle>Proceedings of the 48th Annual International Symposium on Computer Architecture</cTitle>: T1 <Title>A RISC-V in-network accelerator for flexible high-performance low-power packet processing</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3502702&Exemplar=1&LAN=DE A1 Di Girolamo, Salvatore A1 Kurth, Andreas A1 Calotoiu, Alexandru A1 Benz, Thomas A1 Schneider, Timo A1 Beránek, Jakub A1 Benini, Luca A1 Hoefler, Torsten PB IEEE Press YR 2021 K1 in-network compute K1 packet processing K1 sPIN K1 specialized architecture SP 958 OP 971 LK http://dx.doi.org/https://dl.acm.org/doi/10.1109/ISCA52012.2021.00079 DO https://dl.acm.org/doi/10.1109/ISCA52012.2021.00079 SF ELIB - SuUB Bremen
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