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PDL: a high-level hardware design language for pipelined pr..:
, In:
Proceedings of the 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation
,
Zagieboylo, Drew
;
Sherk, Charles
;
Suh, Gookwon Edward
. - p. 719-732 , 2022
Link:
https://dl.acm.org/doi/10.1145/3519939.3523455
RT T1 <cTitle>Proceedings of the 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation</cTitle>: T1 <Title>PDL: a high-level hardware design language for pipelined processors</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3523455&Exemplar=1&LAN=DE A1 Zagieboylo, Drew A1 Sherk, Charles A1 Suh, Gookwon Edward A1 Myers, Andrew C. PB ACM YR 2022 K1 Computer architecture K1 Language design K1 Hardware K1 Hardware description languages and compilation K1 Software and its engineering K1 Compilers SP 719 OP 732 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3519939.3523455 DO https://dl.acm.org/doi/10.1145/3519939.3523455 SF ELIB - SuUB Bremen
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