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1 Ergebnisse
1
Verifying Hardware Optimizations for Efficient Acceleration:
, In:
International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies
,
Wang, Qianzhou
;
Wong, Yat
;
Que, Zhiqiang
. - p. 17-23 , 2022
Link:
https://dl.acm.org/doi/10.1145/3535044.3535047
RT T1 <cTitle>International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies</cTitle>: T1 <Title>Verifying Hardware Optimizations for Efficient Acceleration</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3535047&Exemplar=1&LAN=DE A1 Wang, Qianzhou A1 Wong, Yat A1 Que, Zhiqiang A1 Luk, Wayne PB ACM YR 2022 K1 formal methods K1 functional programming K1 hardware optimization K1 hardware verification K1 simulation K1 theorem proving SP 17 OP 23 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3535044.3535047 DO https://dl.acm.org/doi/10.1145/3535044.3535047 SF ELIB - SuUB Bremen
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