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Hier-3D: A Hierarchical Physical Design Methodology for Fac..:
, In:
Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design
,
Agnesina, Anthony
;
Brunion, Moritz
;
Garcia-Ortiz, Alberto
... - p. 1-6 , 2022
Link:
https://dl.acm.org/doi/10.1145/3531437.3539702
RT T1
Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design
: T1
Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs
UL https://suche.suub.uni-bremen.de/peid=acm-3539702&Exemplar=1&LAN=DE A1 Agnesina, Anthony A1 Brunion, Moritz A1 Garcia-Ortiz, Alberto A1 Catthoor, Francky A1 Milojevic, Dragomir A1 Komalan, Manu A1 Cavalcante, Matheus A1 Riedel, Samuel A1 Benini, Luca A1 Lim, Sung Kyu PB ACM YR 2022 K1 Face-to-Face (F2F) Bonded 3D ICs K1 Hier-3D K1 Physical Design Methodology K1 Wafer-level Bonding K1 Hardware K1 Electronic design automation K1 Physical design (EDA) SP 1 OP 6 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3531437.3539702 DO https://dl.acm.org/doi/10.1145/3531437.3539702 SF ELIB - SuUB Bremen
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