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1 Ergebnisse
1
Improving Convolution via Cache Hierarchy Tiling and Reduce..:
, In:
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques
,
Ferrari, Victor
;
Sousa, Rafael
;
Pereira, Marcio
... - p. 538-539 , 2022
Link:
https://dl.acm.org/doi/10.1145/3559009.3569678
RT T1 <cTitle>Proceedings of the International Conference on Parallel Architectures and Compilation Techniques</cTitle>: T1 <Title>Improving Convolution via Cache Hierarchy Tiling and Reduced Packing</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3569678&Exemplar=1&LAN=DE A1 Ferrari, Victor A1 Sousa, Rafael A1 Pereira, Marcio A1 de Carvalho, João P. L. A1 Amaral, José Nelson A1 Araujo, Guido PB ACM YR 2022 K1 cache blocking K1 convolution K1 data transfer K1 packing K1 General and reference K1 Cross-computing tools and techniques K1 Performance K1 Computing methodologies K1 Machine learning K1 Software and its engineering K1 Software notations and tools K1 Compilers SP 538 OP 539 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3559009.3569678 DO https://dl.acm.org/doi/10.1145/3559009.3569678 SF ELIB - SuUB Bremen
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