I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
CSAIL2019 Crypto-Puzzle Solver Architecture:
, In:
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays
,
Gribok, Sergey
;
Pasca, Bogdan
;
Langhammer, Martin
- p. 197-207 , 2023
Link:
https://dl.acm.org/doi/10.1145/3543622.3573184
RT T1 <cTitle>Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays</cTitle>: T1 <Title>CSAIL2019 Crypto-Puzzle Solver Architecture</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3573184&Exemplar=1&LAN=DE A1 Gribok, Sergey A1 Pasca, Bogdan A1 Langhammer, Martin PB ACM YR 2023 K1 CSAIL2019 puzzle K1 FPGA K1 iterative modular multiplier K1 low-latency K1 modular exponentiation K1 Hardware K1 Integrated circuits K1 Logic circuits K1 Arithmetic and datapath circuits K1 Reconfigurable logic and FPGAs K1 Hardware accelerators K1 Electronic design automation K1 High-level and register-transfer level synthesis K1 Datapath optimization K1 Robustness K1 Fault tolerance K1 Error detection and error correction SP 197 OP 207 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3543622.3573184 DO https://dl.acm.org/doi/10.1145/3543622.3573184 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)
