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1 Ergebnisse
1
TT-GNN: Efficient On-Chip Graph Neural Network Training via..:
, In:
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture
,
Qu, Zheng
;
Niu, Dimin
;
Li, Shuangchen
.. - p. 452-464 , 2023
Link:
https://dl.acm.org/doi/10.1145/3613424.3614305
RT T1 <cTitle>Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture</cTitle>: T1 <Title>TT-GNN: Efficient On-Chip Graph Neural Network Training via Embedding Reformation and Hardware Optimization</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3614305&Exemplar=1&LAN=DE A1 Qu, Zheng A1 Niu, Dimin A1 Li, Shuangchen A1 Zheng, Hongzhong A1 Xie, Yuan PB ACM YR 2023 K1 Graph Neural Networks K1 Hardware Accelerator K1 Tensor-train Decomporition K1 Computer systems organization K1 Architectures K1 Other architectures K1 Neural networks K1 Computing methodologies K1 Symbolic and algebraic manipulation K1 Symbolic and algebraic algorithms K1 Hardware K1 Very large scale integration design K1 Application-specific VLSI designs K1 Application specific integrated circuits SP 452 OP 464 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3613424.3614305 DO https://dl.acm.org/doi/10.1145/3613424.3614305 SF ELIB - SuUB Bremen
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