I agree that this site is using cookies. You can find further informations
here
.
X
Login
Merkliste (
0
)
Home
About us
Home About us
Our history
Profile
Press & public relations
Friends
The library in figures
Exhibitions
Projects
Training, internships, careers
Films
Services & Information
Home Services & Information
Lending and interlibrary loans
Returns and renewals
Training and library tours
My Account
Library cards
New to the library?
Download Information
Opening hours
Learning spaces
PC, WLAN, copy, scan and print
Catalogs and collections
Home Catalogs and Collections
Rare books and manuscripts
Digital collections
Subject Areas
Our sites
Home Our sites
Central Library
Law Library (Juridicum)
BB Business and Economics (BB11)
BB Physics and Electrical Engineering
TB Engineering and Social Sciences
TB Economics and Nautical Sciences
TB Music
TB Art & Design
TB Bremerhaven
Contact the library
Home Contact the library
Staff Directory
Open access & publishing
Home Open access & publishing
Reference management: Citavi & RefWorks
Publishing documents
Open Access in Bremen
zur Desktop-Version
Toggle navigation
Merkliste
1 Ergebnisse
1
Stencil-HMLS: A multi-layered approach to the automatic opt..:
, In:
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis
,
Rodriguez-Canal, Gabriel
;
Brown, Nick
;
Jamieson, Maurice
... - p. 556-565 , 2023
Link:
https://dl.acm.org/doi/10.1145/3624062.3624543
RT T1 <cTitle>Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis</cTitle>: T1 <Title>Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA</Title> UL https://suche.suub.uni-bremen.de/peid=acm-3624543&Exemplar=1&LAN=DE A1 Rodriguez-Canal, Gabriel A1 Brown, Nick A1 Jamieson, Maurice A1 Bauer, Emilien A1 Lydike, Anton A1 Grosser, Tobias PB ACM YR 2023 K1 FPGAs K1 HPC K1 MLIR K1 U280 K1 stencil based codes K1 xDSL K1 Computing methodologies K1 Parallel computing methodologies K1 Parallel programming languages K1 Applied computing K1 Physical sciences and engineering K1 Hardware K1 Integrated circuits K1 Reconfigurable logic and FPGAs K1 Theory of computation SP 556 OP 565 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/3624062.3624543 DO https://dl.acm.org/doi/10.1145/3624062.3624543 SF ELIB - SuUB Bremen
Export
RefWorks (nur Desktop-Version!)
Flow
(Zuerst in
Flow
einloggen, dann importieren)
