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EDF scheduling using two-mode voltage-clock-scaling for har..:

, In: Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems,

Lee, Yann-Hang ; Doh, Yoonmee ; Krishna, C. M. - p. 221-228 , 2001

Link: https://dl.acm.org/doi/10.1145/502217.502255

RT 
T1 <cTitle>Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems</cTitle>: T1 <Title>EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems</Title>

UL https://suche.suub.uni-bremen.de/peid=acm-502255&Exemplar=1&LAN=DE
				
A1 Lee, Yann-Hang
A1 Doh, Yoonmee
A1 Krishna, C. M.
PB ACM
YR 2001
K1 dynamic reclaiming
K1 energy and power optimization
K1 real-time systems
K1 scheduling
K1 voltage scaling
K1 Theory of computation
K1 Design and analysis of algorithms
K1 Approximation algorithms analysis
K1 Scheduling algorithms
K1 Online algorithms
K1 Online learning algorithms
K1 Theory and algorithms for application domains
K1 Machine learning theory
K1 Reinforcement learning
K1 Sequential decision making
K1 Computer systems organization
K1 Embedded and cyber-physical systems
K1 Real-time systems
K1 Hardware
K1 Communication hardware, interfaces and storage
K1 Buses and high-speed links
SP 221
OP 228
LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/502217.502255
DO https://dl.acm.org/doi/10.1145/502217.502255
SF ELIB - SuUB Bremen

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