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1 Ergebnisse
1
PAOLA : A tool for topological optimization of large PLA:
, In:
Proceedings of the 19th Design Automation Conference
,
Chuquillanqui, Samuel
;
Segovia, Tomas Perez
- p. 300-306 , 1982
Link:
https://dl.acm.org/doi/10.5555/800263.809221
RT T1
Proceedings of the 19th Design Automation Conference
: T1
PAOLA : A tool for topological optimization of large PLAS
UL https://suche.suub.uni-bremen.de/peid=acm-809221&Exemplar=1&LAN=DE A1 Chuquillanqui, Samuel A1 Segovia, Tomas Perez PB IEEE Press YR 1982 K1 Hardware K1 Electronic design automation K1 Logic synthesis K1 Circuit optimization K1 High-level and register-transfer level synthesis K1 Datapath optimization K1 Very large scale integration design K1 Integrated circuits K1 Logic circuits K1 Combinational circuits K1 Physical design (EDA) K1 Partitioning and floorplanning SP 300 OP 306 LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/800263.809221 DO https://dl.acm.org/doi/10.5555/800263.809221 SF ELIB - SuUB Bremen
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