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1 Ergebnisse
1
Synchronous Logic Simulator:
, In:
Proceedings of the 4th Design Automation Conference
,
McKinney, Jay G.
- p. 13.1-13.31 , 1967
Link:
https://dl.acm.org/doi/10.1145/800270.810868
RT T1 <cTitle>Proceedings of the 4th Design Automation Conference</cTitle>: T1 <Title>Synchronous Logic Simulator</Title> UL https://suche.suub.uni-bremen.de/peid=acm-810868&Exemplar=1&LAN=DE A1 McKinney, Jay G. PB ACM YR 1967 K1 Hardware K1 Integrated circuits K1 Logic circuits K1 Hardware validation K1 Functional verification K1 Simulation and emulation SP 13.1 OP 13.31 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/800270.810868 DO https://dl.acm.org/doi/10.1145/800270.810868 SF ELIB - SuUB Bremen
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