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Robust Implementation and Statistical Modeling of a VI-Conv..:

, In: Proceedings of the 13th symposium on Integrated circuits and systems design,

Graupner, A. ; Schuffny, R. - p. 83 ff. , 2000

Link: https://dl.acm.org/doi/10.5555/827245.827343

RT 
T1 <cTitle>Proceedings of the 13th symposium on Integrated circuits and systems design</cTitle>: T1 <Title>Robust Implementation and Statistical Modeling of a VI-Converter</Title>

UL https://suche.suub.uni-bremen.de/peid=acm-827343&Exemplar=1&LAN=DE
				
A1 Graupner, A.
A1 Schuffny, R.
PB IEEE Computer Society
YR 2000
K1 0.6 /spl mu/m technology
K1 0.6 mum
K1 1 muA
K1 48/spl times/90 /spl mu/m/sup 2/ Si area
K1 5 V
K1 5 V supply voltage
K1 CMOS analogue integrated circuits
K1 CMOS imager
K1 Si
K1 VI-converter
K1 analogue processing circuits
K1 computational effort
K1 convertors
K1 correlated double sampling
K1 image processing equipment
K1 moderate inversion
K1 network topology
K1 numerical analysis
K1 random device parameter variation
K1 robust circuit topology
K1 single-ended input signal
K1 statistical analysis
K1 statistical modeling
K1 transfer functions
K1 unipolar differential input voltages
K1 up to 1 /spl mu/A
K1 variance calculation
K1 weak inversion
SP 83 ff.
LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/827245.827343
DO https://dl.acm.org/doi/10.5555/827245.827343
SF ELIB - SuUB Bremen

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