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1 Ergebnisse
1
Formal Verification Coverage : Are the RTL-Properties Co..:
, In:
Proceedings of the conference on Design, automation and test in Europe - Volume 1
,
Basu, Prasenjit
;
Das, Sayantan
;
Dasgupta, Pallab
... - p. 10668 ff. , 2004
Link:
https://dl.acm.org/doi/10.5555/968878.968985
RT T1
Proceedings of the conference on Design, automation and test in Europe - Volume 1
: T1
Formal Verification Coverage : Are the RTL-Properties Covering the Design's Architectural Intent?
UL https://suche.suub.uni-bremen.de/peid=acm-968985&Exemplar=1&LAN=DE A1 Basu, Prasenjit A1 Das, Sayantan A1 Dasgupta, Pallab A1 Chakrabarti, P. P. A1 Mohan, Chunduri Rama A1 Fix, Limor PB IEEE Computer Society YR 2004 K1 Hardware K1 Hardware validation K1 Functional verification SP 10668 ff. LK http://dx.doi.org/https://dl.acm.org/doi/10.5555/968878.968985 DO https://dl.acm.org/doi/10.5555/968878.968985 SF ELIB - SuUB Bremen
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