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1 Ergebnisse
1
Modeling of polysilicide gate resistance effect on inverter..:
, In:
Proceedings of the 14th ACM Great Lakes symposium on VLSI
,
Koolivand, Y.
;
Zahabi, A.
;
Masoumi, N.
- p. 149-153 , 2004
Link:
https://dl.acm.org/doi/10.1145/988952.988989
RT T1
Proceedings of the 14th ACM Great Lakes symposium on VLSI
: T1
Modeling of polysilicide gate resistance effect on inverter delay and power consumption using distributed RC method and branching technique
UL https://suche.suub.uni-bremen.de/peid=acm-988989&Exemplar=1&LAN=DE A1 Koolivand, Y. A1 Zahabi, A. A1 Masoumi, N. PB ACM YR 2004 K1 performance degradation K1 polysilicide gate resistance K1 propagation delay K1 short circuit power K1 Hardware K1 Very large scale integration design K1 Hardware validation SP 149 OP 153 LK http://dx.doi.org/https://dl.acm.org/doi/10.1145/988952.988989 DO https://dl.acm.org/doi/10.1145/988952.988989 SF ELIB - SuUB Bremen
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